A Low-complexity Hardware AWGN Channel Emulator on FPGA using Central Limit Theorem.
Arathy B. NairArijit MondalShayan Srinivasa GaraniPublished in: MWSCAS (2018)
Keyphrases
- low complexity
- central limit theorem
- field programmable gate array
- hardware implementation
- hardware architecture
- low cost
- vlsi architecture
- parallel hardware
- hardware design
- probability distribution
- real time
- motion estimation
- xilinx virtex
- reconfigurable hardware
- embedded systems
- computational complexity
- lower complexity
- heavy traffic
- distributed video coding
- signal processing
- high speed
- data acquisition
- markov chain
- computing systems
- high data rate
- multiple description coding
- image processing
- parallel computing
- steady state
- image sequences