Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.
Jie ZhouYong DouYuanwu LeiJinbo XuYazhuo DongPublished in: HPCC (2008)
Keyphrases
- floating point
- instruction set
- fpga implementation
- floating point arithmetic
- high speed
- square root
- single chip
- fixed point
- systolic array
- gate array
- hardware implementation
- floating point unit
- field programmable gate array
- parallel architecture
- digital signal
- sparse matrices
- xilinx virtex
- fpga device
- interval arithmetic
- level parallelism
- digital computer
- graphics processing units
- hardware architecture
- memory bandwidth
- image processing
- computer architecture
- data processing
- low cost
- massively parallel
- general purpose processors
- application specific