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A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement.
Hua Wang
Antonis Papanikolaou
Miguel Miranda
Francky Catthoor
Published in:
ASP-DAC (2004)
Keyphrases
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physical design
design methodology
high speed
image segmentation
design tools
optimization process
chip design
neural network
distributed systems
data mining
e learning
power consumption
main memory
computing environments