Reducing AFDX jitter in a mixed NoC/AFDX architecture.

Laure Abdallah Jérôme Ermont Jean-Luc Scharbarg Christian Fraboul

Published in: WFCS (2018)

Keyphrases

multi processor
network on chip
management system
routing algorithm
software architecture
architectural design
packet switched
end to end delay
case study
expert systems
hardware implementation
network architecture