Enhanced hardware shifting priority queue architecture with reduced switching activity.
George-Iulian UleruVasile-Ion MantaAndrei StanPublished in: ICSTCC (2020)
Keyphrases
- priority queue
- hardware architecture
- real time
- hardware implementation
- data structure
- low cost
- vlsi implementation
- software implementation
- hardware software
- hardware design
- hardware and software
- vlsi architecture
- service times
- multithreading
- human activities
- dedicated hardware
- pipeline architecture
- parallel architecture
- content addressable
- fpga technology
- processing units
- intelligent agents
- neural network