Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration.
Minuk HeoSunghyun BaeJayeol LeeCheonsu KimMinjae LeePublished in: ESSCIRC (2017)
Keyphrases
- low power
- high power
- mixed signal
- power consumption
- low cost
- low power consumption
- high speed
- vlsi circuits
- wide dynamic range
- single chip
- logic circuits
- vlsi architecture
- digital signal processing
- image compression
- multi channel
- real time
- wireless transmission
- cmos image sensor
- power dissipation
- power reduction
- low complexity
- delay insensitive