A 690-mW 1-Gb/s 1024-b, rate-1/2 low-density parity-check code decoder.
Andrew J. BlanksbyChris J. HowlandPublished in: IEEE J. Solid State Circuits (2002)
Keyphrases
- low density parity check
- ldpc codes
- rate allocation
- channel capacity
- decoding algorithm
- error correction
- distributed video coding
- channel coding
- message passing
- low complexity
- distributed source coding
- power consumption
- end to end
- error resilience
- image transmission
- physical layer
- source coding
- turbo codes
- single pass
- rate distortion
- bitstream
- video transmission
- bit plane
- vlsi architecture
- channel conditions
- video coding
- image compression
- video sequences
- coding scheme
- bit rate
- computational complexity