Boosting Instruction Set Simulator Performance with Parallel Block Optimisation and Replacement.
Brad AlexanderSean DonnellanAndrew JeffriesTravis OldsNicholas SizerPublished in: ACSC (2012)
Keyphrases
- instruction set
- computer architecture
- level parallelism
- floating point
- floating point arithmetic
- application specific
- computer systems
- parallel processing
- embedded systems
- instruction set architecture
- information systems
- parallel programming
- block size
- high performance computing
- parallel computing
- parallel implementation
- shared memory
- data structure