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Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routing.

Tsun-Ming TsengBing LiChing-Feng YehHsiang-Chieh JhanZuo-Min TsaiMark Po-Hung LinUlf Schlichtmann
Published in: DAC (2016)
Keyphrases
  • fixed length
  • variable length
  • microstrip
  • feature vectors
  • dual band
  • small size
  • patch antenna
  • bitstream
  • computational complexity
  • pose estimation
  • coding scheme
  • transmission line
  • low pass filter