A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOS.
Gyu-Seob JeongHankyu ChiKyungock KimDeog-Kyoon JeongPublished in: ISCAS (2014)
Keyphrases
- low power
- cmos technology
- high speed
- nm technology
- image sensor
- power consumption
- low cost
- focal plane
- single chip
- low voltage
- power reduction
- logic circuits
- high power
- wireless transmission
- vlsi architecture
- power dissipation
- low power consumption
- metal oxide semiconductor
- solid state
- delay insensitive
- vlsi circuits
- silicon on insulator
- mixed signal
- digital signal processing
- ultra low power
- gate array