An Instruction Buffer for a Low-Power DSP.
Mike J. G. LewisL. E. M. BrackenburyPublished in: ASYNC (2000)
Keyphrases
- low power
- digital signal processing
- high speed
- power consumption
- low cost
- low power consumption
- high power
- single chip
- vlsi architecture
- gate array
- wireless transmission
- signal processing
- power dissipation
- vlsi circuits
- power saving
- data flow
- mixed signal
- digital signal processor
- image sensor
- power reduction
- delay insensitive
- signal processor
- real time