An Efficient Partitioning Algorithm of Combinational CMOS Circuits.

Bassam Shaer Khaled Dib

Published in: ISVLSI (2002)

Keyphrases

partitioning algorithm
delay insensitive
analog vlsi
high speed
asynchronous circuits
circuit design
graph partitioning
logic circuits
vlsi circuits
low power
cmos technology
chip design
vertical partitioning
clustering algorithm
focal plane
low voltage
test images