The use of vector instructions of a processor architecture for emulating the vector instructions of another processor architecture.
K. A. BatuzovPublished in: Program. Comput. Softw. (2017)
Keyphrases
- instruction set
- parallel processing
- instruction set architecture
- systolic array
- high speed
- data sets
- multithreading
- parallel architecture
- network architecture
- real time
- data flow
- vector space
- multi core processors
- low cost
- feature vectors
- design considerations
- software architecture
- industry standard
- computation intensive