Model Checking the Design of an Unrestricted, Stuck-at Fault Tolerant, Asynchronous Sequential Circuit Using SMV.
Meine van der MeulenPublished in: FMCAD (2002)
Keyphrases
- model checking
- fault tolerant
- formal verification
- temporal logic
- fault tolerance
- symbolic model checking
- model checker
- asynchronous circuits
- formal methods
- distributed systems
- automated verification
- formal specification
- finite state
- temporal properties
- verification method
- pspace complete
- transition systems
- finite state machines
- reachability analysis
- concurrent systems
- computation tree logic
- timed automata
- load balancing
- state machine
- epistemic logic
- process algebra
- bounded model checking
- data replication
- satisfiability problem
- modal logic
- binary decision diagrams
- multi agent systems
- deterministic finite automaton