Accelerating Irregular Computation in Massive Short Reads Mapping on FPGA Co-Processor.
Guangming TanChunming ZhangWen TangPeiheng ZhangNinghui SunPublished in: IEEE Trans. Parallel Distributed Syst. (2016)
Keyphrases
- high speed
- single chip
- digital signal
- parallel architecture
- systolic array
- gate array
- computation intensive
- pipelined architecture
- data sets
- xilinx virtex
- field programmable gate array
- real time
- arbitrarily shaped
- fpga device
- hardware implementation
- irregularly shaped
- multiprocessor systems
- parallel computation
- signal processing
- low cost