A highly-parallel VLSI architecture for a list sphere detector.

Benjamin Widdup Graeme Woodward Geoff Knagge

Published in: ICC (2004)

Keyphrases

highly parallel
vlsi architecture
low power
single chip
vlsi implementation
low complexity
efficient implementation
real time
parallel architectures
computing systems
low cost
single pass
high speed
power consumption
general purpose
parallel programming
motion estimation