High-Throughput Low Power Area Efficient 17-bit 2's Complement Multilayer Perceptron Components and Architecture for on-Chip Machine Learning in Implantable Devices.
James Brian RomaineMario Pereira MartínPublished in: IEEE Access (2022)
Keyphrases
- low power
- high throughput
- multilayer perceptron
- high speed
- low cost
- low power consumption
- nm technology
- cmos technology
- mixed signal
- machine learning
- single chip
- power consumption
- data acquisition
- vlsi architecture
- microarray
- low latency
- genome wide
- biological data
- signal processor
- cmos image sensor
- neural network
- analog to digital converter
- back propagation
- real time
- power dissipation
- image sensor
- artificial neural networks
- proteomic data
- radial basis function
- embedded systems
- vlsi implementation
- mass spectrometry data
- artificial intelligence
- neural network model
- decision trees
- pattern recognition
- learning algorithm
- power reduction
- low voltage
- logic circuits
- data analysis
- digital signal processing
- mass spectrometry
- support vector machine
- ultra low power
- parallel processing
- wireless sensor networks
- computer vision
- genetic algorithm
- data sets