A VLSI Systolic Array Architecture for Computation of Third-Order Cumulants for Two-Dimensional Signals.
Ziad H. MussallamRana Ejaz AhmedSaleh A. AlshebeiliPublished in: PARELEC (2000)
Keyphrases
- systolic array
- parallel architecture
- data flow
- reconfigurable architecture
- signal processing
- blind source separation
- three dimensional
- high speed
- vlsi implementation
- multi dimensional
- parallel processing
- processor array
- vlsi architecture
- hardware implementation
- management system
- image processing
- eeg signals
- real time
- independent component analysis
- fourth order
- software architecture
- higher order
- data model