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A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks.
Govind Narasimman
Subhrajit Roy
Xuanyao Fong
Kaushik Roy
Chip-Hong Chang
Arindam Basu
Published in:
ISCAS (2016)
Keyphrases
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cmos technology
low power
low voltage
power consumption
high speed
low cost
mixed signal
spiking neural networks
learning rules
power management
parallel processing
design considerations
digital signal processing
image sensor
logic circuits
power dissipation
real time
biologically inspired
frame rate
spiking neurons
fuzzy logic
neural network