A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks.
Govind NarasimmanSubhrajit RoyXuanyao FongKaushik RoyChip-Hong ChangArindam BasuPublished in: ISCAS (2016)
Keyphrases
- cmos technology
- low power
- low voltage
- power consumption
- high speed
- low cost
- mixed signal
- spiking neural networks
- learning rules
- power management
- parallel processing
- design considerations
- digital signal processing
- image sensor
- logic circuits
- power dissipation
- real time
- biologically inspired
- frame rate
- spiking neurons
- fuzzy logic
- neural network