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Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm.

Henry KuoIngrid Verbauwhede
Published in: CHES (2001)
Keyphrases
  • vlsi implementation
  • computational complexity
  • computationally efficient
  • artificial neural networks
  • multiresolution
  • high speed
  • region of interest