A low-power 10-bit single-slope ADC using power gating and multi-clocks for CMOS image sensors.
Byoung-Kwan JeonSeong-Kwan HongOh-Kyong KwonPublished in: ISOCC (2016)
Keyphrases
- low power
- analog to digital converter
- power consumption
- image sensor
- high power
- single chip
- mixed signal
- high speed
- low cost
- wide dynamic range
- ultra low power
- power dissipation
- cmos technology
- low power consumption
- vlsi circuits
- digital signal processing
- power reduction
- cmos image sensor
- solid state
- power management
- delay insensitive
- dynamic range
- multi channel
- real time
- efficient implementation
- parallel processing