Formal Verification of DEV&DESS Formalism Using Symbolic Model Checker HyTech.
Han ChoiSung Deok ChaJae Yeon JoJunbeom YooHae Young LeeWon-Tae KimPublished in: FGIT-CA/CES3 (2011)
Keyphrases
- formal verification
- model checker
- model checking
- transition systems
- symbolic model checking
- bounded model checking
- automated verification
- knowledge representation
- iso iec
- symbolic representation
- high level
- temporal logic
- description language
- binary decision diagrams
- formal specification
- diagnosis of discrete event systems
- formal methods
- object oriented
- fuzzy logic
- reinforcement learning