Prioritizing Scenarios based on STAMP/STPA Using Statistical Model Checking.
Mitsuaki TsujiToshinori TakaiKazuki KakimotoNaoki IshihamaMasafumi KatahiraHajimu IidaPublished in: ICST Workshops (2020)
Keyphrases
- model checking
- temporal logic
- automated verification
- formal verification
- temporal properties
- model checker
- partial order reduction
- formal specification
- formal methods
- finite state
- timed automata
- bounded model checking
- finite state machines
- symbolic model checking
- transition systems
- verification method
- epistemic logic
- reachability analysis
- computation tree logic
- pspace complete
- asynchronous circuits
- concurrent systems
- modal logic
- linear temporal logic
- deterministic finite automaton
- reactive systems
- artificial intelligence