Block and booth floating point number multiplication algorithms in FPGA's generalized learning vector quantization implementation.
Yulistiyan WardhanaH. S. PutraS. I. SakinahWisnu JatmikoPetrus MursantoPrahesa Kusuma SetiaPublished in: IWBIS (2017)
Keyphrases
- floating point
- learning vector quantization
- sparse matrices
- floating point arithmetic
- fixed point
- graphics processing units
- interval arithmetic
- fast fourier transform
- instruction set
- software implementation
- data structure
- efficient implementation
- hardware architectures
- learning algorithm
- matrix multiplication
- image data
- feature selection