Analytical Model of Static Noise Margin in CMOS SRAM for Variation Consideration.

Hirofumi Shinohara Koji Nii Hidetoshi Onodera

Published in: IEICE Trans. Electron. (2008)

Keyphrases

analytical model
power consumption
low power
random access memory
analytical models
low cost
noisy data
high speed
simulation model
random noise
noise reduction
support vector
noise level
power management
analog vlsi
low voltage
circuit design
training set