An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping (abstract only).

Sven Heithecker Rolf Ernst

Published in: FPGA (2005)

Keyphrases

resource utilization
high level
higher level
quality of service
real time
traffic engineering
scheduling problem
flow control
packet scheduling
real time traffic
network conditions
traffic light
control algorithm
admission control
traffic flow
qos aware
differentiated services
service differentiation
control system