Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder.
Jiovana Sousa GomesTulio Pereira BitencourtSergio BampiFábio Luís Livi RamosPublished in: IEEE Des. Test (2022)
Keyphrases
- high throughput
- low power
- vlsi architecture
- high speed
- low cost
- power consumption
- microarray
- genome wide
- cmos technology
- data acquisition
- biological data
- nm technology
- single chip
- mixed signal
- systems biology
- signal processor
- genomic data
- protein protein interactions
- low power consumption
- real time
- mass spectrometry
- low complexity
- mass spectrometry data
- logic circuits
- proteomic data
- gate array
- data flow
- hardware implementation
- signal processing
- pattern recognition
- image processing
- computer vision