Flip-flop insertion with shifted-phase clocks for FPGA power reduction.

Hyeonmin Lim Kyungsoo Lee Youngjin Cho Naehyuck Chang

Published in: ICCAD (2005)

Keyphrases

power reduction
power dissipation
power consumption
flip flops
low power
power saving
cmos technology
finite state machines
low cost
high speed
multithreading
single phase
computer vision
parallel processing
design methodology
digital signal processing