Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph.
Chung-Kuan ChengPeng DuAndrew B. KahngShih-Hung WengPublished in: ISPD (2012)
Keyphrases
- low power
- shortest path
- high speed
- steiner tree
- weighted graph
- shortest path problem
- minimum spanning tree
- flow graph
- low cost
- finding the shortest path
- power consumption
- path length
- edge weights
- graph search
- strongly connected components
- road network
- betweenness centrality
- single chip
- routing algorithm
- vlsi circuits
- source node
- low power consumption
- shortest path algorithm
- logic circuits
- graph structure
- random walk
- vlsi architecture
- spanning tree
- directed graph
- connected components
- optimal path
- graph partitioning
- gate array
- facility location
- image sensor
- low complexity
- mixed signal
- bipartite graph
- graph theory
- ultra low power