A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors.
Abbas MazloumiMehdi ModarressiPublished in: DATE (2015)
Keyphrases
- network on chip
- memory access
- shared memory
- multi processor
- power dissipation
- distributed memory
- data access
- cmos technology
- data transfer
- power consumption
- message passing
- routing algorithm
- parallel algorithm
- high speed
- low power
- network simulator
- parallel programming
- cache misses
- main memory
- multithreading
- parallel computing
- packet switching
- memory management
- parallel machines
- external memory
- high volume
- network devices
- instruction set
- data management
- databases
- real time