A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS.
Yu-Chuan LinHen-Wai TsaoPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
Keyphrases
- cmos technology
- decision feedback
- high speed
- silicon on insulator
- low power
- metal oxide semiconductor
- real time
- nm technology
- low voltage
- circuit design
- power consumption
- low cost
- parallel processing
- analog vlsi
- multipath
- monitoring system
- error propagation
- computer simulation
- power dissipation
- eye tracking
- soft decision
- eye movements
- image sensor
- delay insensitive
- chip design
- integrated circuit
- single chip
- mixed signal
- fading channels
- vlsi circuits
- end to end
- power reduction
- visual field
- ibm power processor
- analog circuits