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Design and VLSI implementation of power efficient processor for object localisation in large WSN.
Joyashree Bag
Rashmi Ranjan Sahoo
Pranab Kishore Dutta
Subir Kumar Sarkar
Published in:
Int. J. High Perform. Syst. Archit. (2013)
Keyphrases
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vlsi implementation
vlsi architecture
high speed
object localisation
real time
feature extraction
ibm power processor
pairwise
artificial neural networks
wireless sensor networks
computationally efficient