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A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors for a Laser Irradiation Failure Analysis.
Hiroshi Hatano
Published in:
IEICE Trans. Electron. (2012)
Keyphrases
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power consumption
circuit design
low power
cmos technology
data analysis
user interface
high speed
design process
low cost
experimental design
single chip
power dissipation