An Ultra-low-power 28nm CMOS Dual-die ASIC Platform for Smart Hearables.
Yu PuDanny ButterfieldJorge GarciaJing XieMark LinRohit SauhtaRick FarleySteve ShellhammerMoses DerkalousdianAdam NewhamChunlei ShiRavi ShenoyEvgeni GousevRashid AttarPublished in: BioCAS (2018)
Keyphrases
- ultra low power
- low power
- single chip
- cmos technology
- circuit design
- power consumption
- high speed
- low cost
- integrated circuit
- nm technology
- metal oxide semiconductor
- real time
- hardware implementation
- design methodology
- silicon on insulator
- smart spaces
- embedded dram
- wireless sensor
- neural network
- ambient computing
- cmos image sensor
- analog vlsi
- digital signal processing
- image sensor
- smart grid
- image enhancement