Model Checking for Timed Logic Processes.
Supratik MukhopadhyayAndreas PodelskiPublished in: Computational Logic (2000)
Keyphrases
- model checking
- timed automata
- model checker
- epistemic logic
- verification method
- partial order reduction
- temporal logic
- bounded model checking
- alternating time temporal logic
- linear temporal logic
- asynchronous circuits
- transition systems
- finite state machines
- formal verification
- ctl model update
- modal logic
- temporal properties
- reachability analysis
- coalition logic
- linear time temporal logic
- automated verification
- formal specification
- symbolic model checking
- cl pc
- formal methods
- finite state
- process algebra
- description language
- computation tree logic
- concurrent systems
- reactive systems
- pspace complete
- process model
- knowledge based systems