Accelerating ViT Inference on FPGA through Static and Dynamic Pruning.
Dhruv ParikhShouyi LiBingyi ZhangRajgopal KannanCarl E. BusartViktor K. PrasannaPublished in: CoRR (2024)
Keyphrases
- pruning method
- high speed
- bayesian networks
- probabilistic inference
- hardware implementation
- real time
- search space
- low cost
- belief networks
- systolic array
- real time image processing
- field programmable gate array
- probabilistic reasoning
- bayesian inference
- inference engine
- random fields
- bayesian model
- efficient learning
- decision trees
- grammatical inference
- genetic algorithm
- neural network
- fpga implementation
- hardware architectures
- tree pruning
- data sets