Login / Signup
Exploring Thread Coarsening on FPGA.
Mostafa Eghbali Zarch
Reece Neff
Michela Becchi
Published in:
CoRR (2022)
Keyphrases
</>
high speed
real time
low cost
signal processing
fpga implementation
field programmable gate array
hardware implementation
case study
finer granularity
low power consumption
single chip
verilog hdl
fpga hardware
hardware design
graph partitioning
pattern recognition
image segmentation
computer vision
real world