VLSI Implementation of Area-Efficient Parallelized Neural Network Accelerator Using Hashing Trick.

Tae Koan Yoo Jong Kang Park Jong Tae Kim

Published in: ISOCC (2019)

Keyphrases

vlsi implementation
neural network
associative memory
computer vision
support vector
pattern recognition
hashing algorithm
artificial neural networks
multiresolution
computationally efficient
neural network model