Algorithm-Hardware Codesign of a Fast Parallel Routing Architecture for Clos Networks.
Si-Qing ZhengAshwin GumasteEnyue LuPublished in: J. Interconnect. Networks (2010)
Keyphrases
- hardware implementation
- learning algorithm
- pipeline architecture
- parallel architecture
- parallel implementation
- k means
- real time
- dynamic programming
- hardware architecture
- detection algorithm
- routing problem
- fpga technology
- parallel programming
- parallel computation
- objective function
- segmentation algorithm
- expectation maximization
- probabilistic model
- computer architecture
- image processing algorithms
- software implementation
- np hard