A directional and scalable streaming deblocking filter hardware architecture for HEVC decoder.
Swamy BaldevPradeep Kumar RathoreRangababu PeesapatiKiran Kumar AnumandlaPublished in: Microprocess. Microsystems (2021)
Keyphrases
- hardware architecture
- deblocking filter
- video coding standard
- video codec
- scalable video coding
- low bit rate
- coding method
- video coding
- scalable video
- motion compensation
- video streaming
- coding efficiency
- low complexity
- motion vectors
- motion compensated
- digital video
- bit rate
- hardware implementation
- video compression
- video communication
- discrete cosine transform
- video quality
- motion estimation
- inter frame
- block size
- rate distortion
- image coding
- intra prediction
- macroblock
- blocking artifacts
- field programmable gate array
- video sequences
- video signals
- coding scheme
- error concealment
- transform domain
- video transmission
- real time
- rate control
- image compression
- distributed video coding
- compression algorithm
- associative memory
- video streams
- video coder
- mode decision
- optical flow
- visual quality
- spatial domain
- image quality
- error resilience
- block matching
- signal processing