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HyperGen: High-Performance Flexible Packet Generator Using Programmable Switching ASIC.
Zhaowei Xi
Yu Zhou
Dai Zhang
Jinqiu Wang
Sun Chen
Yangyang Wang
Xinrui Li
Haoming Wang
Jianping Wu
Published in:
SIGCOMM Posters and Demos (2019)
Keyphrases
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single chip
signal processor
integrated circuit
switched networks
packet loss
hardware implementation
embedded dram
general purpose
design methodology
low cost
real time
file system
lightweight
graphics processing units
circuit design
signal processing
buffer size