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Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization.

César A. M. MarconRamon FernandesRodrigo CataldoFernando GrandoThais WebberAna BensoLeticia B. Poehls
Published in: VLSI Design (2014)
Keyphrases
  • d mesh
  • network on chip
  • d objects
  • skeleton extraction
  • three dimensional
  • texture mapping
  • objective function
  • geometric properties
  • viewpoint
  • multi processor
  • data transfer
  • network simulator