A low power VLSI implementation for variable length decoder in MPEG-1 layer III.
Tsung-Han TsaiWen-Cheng ChenChun-Nan LiuPublished in: ICME (2003)
Keyphrases
- variable length
- low power
- vlsi architecture
- vlsi implementation
- power consumption
- high speed
- low cost
- bitstream
- video coding standard
- low complexity
- compressed video
- compressed domain
- error resilient
- error concealment
- low power consumption
- rate allocation
- macroblock
- discrete cosine transform
- coding method
- video codec
- distributed video coding
- n gram
- video compression
- video coding
- coding scheme
- filter bank
- entropy coding
- fir filters
- computer vision
- video sequences
- video quality
- associative memory
- bit rate