A 6b 48-GS/s Asynchronous 2b/cycle Time-Interleaved ADC in 28-nm CMOS.
Hong-Seok ChoiSeungha RohSanghee LeeJung-Hoon ParkKwanghoon LeeYoung-Ha HwangDeog-Kyoon JeongPublished in: ISOCC (2021)
Keyphrases
- delay insensitive
- cmos technology
- analog to digital converter
- silicon on insulator
- nm technology
- metal oxide semiconductor
- single chip
- low power
- high speed
- asynchronous circuits
- power consumption
- low cost
- analog vlsi
- power supply
- image sensor
- low voltage
- asynchronous communication
- vlsi circuits
- state machines
- rolling shutter
- circuit design
- asynchronous cellular automata
- neural network