Login / Signup

An efficient analytical model of coupled on-chip RLC interconnects.

Liang YinLei He
Published in: ASP-DAC (2001)
Keyphrases
  • analytical model
  • analytical models
  • high speed
  • low cost
  • simulation model
  • power dissipation
  • cmos technology
  • analog vlsi
  • input output
  • bit error rate
  • lower cost
  • programmable logic