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Stannis: Low-Power Acceleration of DNN Training Using Computational Storage Devices.
Ali Heydari Gorji
Mahdi Torabzadehkashi
Siavash Rezaei
Hossein Bobarshad
Vladimir Castro Alves
Pai H. Chou
Published in:
DAC (2020)
Keyphrases
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low power
low power consumption
storage devices
power consumption
low cost
training process
high speed
single chip
vlsi circuits
file system
logic circuits
flash memory
gate array
wireless communication
cmos technology
post processing
general purpose
real time
database