Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis.
Pankaj ChauhanEdmund M. ClarkeJames H. KukulaSamir SapraHelmut VeithDong WangPublished in: FMCAD (2002)
Keyphrases
- model checking
- bounded model checking
- temporal logic
- verification method
- automated verification
- state space
- formal specification
- finite state
- computation tree logic
- formal verification
- process algebra
- epistemic logic
- abstract interpretation
- linear temporal logic
- partial order reduction
- knowledge base
- timed automata
- symbolic model checking
- pspace complete
- formal methods
- constraint satisfaction