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An Efficient Partitioning Algorithm Based on Hypergraph for 3D Network-On-Chip Architecture Floorplanning.
Junyan Tan
Chunhua Cai
Published in:
J. Circuits Syst. Comput. (2019)
Keyphrases
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partitioning algorithm
network on chip
routing algorithm
multi processor
packet switched
graph partitioning
higher order
network simulator
real time
wireless sensor networks
data flow
power dissipation
shared memory
clustering method
unsupervised learning
graphical models
pairwise