A configurable symbol timing recovery based on FPGA with fast convergence to synchronization.
Yin Hui ChyeMohd Fadzil AinPublished in: ISCIT (2012)
Keyphrases
- high speed
- field programmable gate array
- convergence rate
- recovery algorithm
- convergence speed
- hardware implementation
- iterative algorithms
- faster convergence
- global convergence
- hardware design
- real time
- fpga implementation
- multi stream
- signal processing
- fpga hardware
- convergence analysis
- low cost
- hidden markov models
- multi objective
- image processing
- data sets