Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients.
Yong-Eun KimKyung-Ju ChoJin-Gyun ChungPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2007)
Keyphrases
- low power
- power consumption
- low cost
- single chip
- low power consumption
- high speed
- vlsi architecture
- logic circuits
- gate array
- mixed signal
- power reduction
- digital signal processing
- cmos technology
- high power
- power dissipation
- design process
- ultra low power
- efficient implementation
- nm technology
- hardware and software
- wavelet coefficients
- cmos image sensor